Observability of the Java Virtual Machine

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The JVM is one of the most observable runtimes. It provides us lots of tools for troubleshooting a JVM application in production. 1. Thread observability Threads are how the JVM actually does work. When something is wrong in production, the symptom is almost always a thread: stopped, blocked, leaking etc. Thread dumps work on any JVM with no  instrumentation, no agents, no restarts. <Example project link with /threaddump endpoint>         // (1) Deadlock — two threads grab the same pair of locks in opposite order.         new Thread(() -> grab(LOCK_A, LOCK_B), "deadlock-A-then-B").start();         new Thread(() -> grab(LOCK_B, LOCK_A), "deadlock-B-then-A").start(); http://localhost:8080/actuator/threaddump To list the JVMS, we can use the command below. PS C:\observe-jvm> jps -lv 25296 jdk.jcmd/sun.tools.jps.Jps -Dapplication.home=C:\Program Files\Microsoft\jdk-21.0.3.9-hotspot -Xms8m -Djdk.module.main=...
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Running SPEC2000 binaries on SimpleScalar

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Fast-forwarding and limiting the instructions:

Example: fast-forward 1 million instructions and then execute 100 million instructions:

(under simple-sim3.0 directory)

./sim-outorder -max:inst 1000000000 tests/spec2000/164.gzip/gzip00.peak.ev6 input.source 60









sim-outorder 256.bzip2/bzip200.peak.ev6 input.source 58

 sim-outorder 164.gzip/gzip00.peak.ev6 input.source 60

 sim-outorder 164.gzip/gzip00.peak.ev6 2000000: input.source 60

 sim-outorder 2000000: 181.mcf/mcf00.peak.ev6 inp.in

sim-outorder 186.crafty/crafty00.peak.ev6 < crafty.in

sim-outorder 197.parser/parser00.peak.ev6 2.1.dict -batch < 197.parser/ref.in

sim-outorder x175.vpr/vpr00.peak.ev6 < x175.vpr/net.in

sim-outorder 183.equake/equake00.peak.ev6 < 183.equake/inp.in

sim-outorder _177.mesa/mesa00.peak.ev6 < _177.mesa/mesa.in

Percentage of instructions that are fetched from the same page:

int/bzip2: 99%
int/gzip:  99%
int/mcf: 95%
int/crafty: 99%
int/parser: 95%
int/x175.vpr: 95%
float/lukas: 97%
float/equake: %98
float/wupwise: %96
float/mesa: %99
float/art: %93
float/sixtrack: %99 


 [1] Zhao, L. E. I., et al. "A leakage efficient instruction tlb design for embedded processors." IEICE TRANSACTIONS on Information and Systems 94.8 (2011): 1565-1574.


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